International Parallel and Distributed Processing Symposium (IPDPS'03)
A Reconfigurable Processor Architecture and Software Development Environment for Embedded Systems
Nice, France
April 22-April 26
ISBN: 0-7695-1926-1
Flexibility, high computing power and low energy consumption are strong guidelines when designing new generation embedded processors. Traditional architectures are no longer suitable to provide a good compromise among these contradictory implementation requirements. In this paper we present a new reconfigurable processor that tightly couples a VLIW architecture with a configurable unit implementing an additional configurable pipeline. A software development environment is also introduced providing a user-friendly tool for application development and performance simulation. Finally, we show that the HW/SW reconfigurable platform proposed achieves dramatic improvement in both speed and energy consumption on signal processing computation kernels.
Citation:
F. Campi, A. Cappelli, R. Guerrieri, A. Lodi, M. Toma, A. La Rosa, L. Lavagno, C. Passerone, R. Canegallo, "A Reconfigurable Processor Architecture and Software Development Environment for Embedded Systems," ipdps, pp.171a, International Parallel and Distributed Processing Symposium (IPDPS'03), 2003