International Parallel and Distributed Processing Symposium (IPDPS'03)
Miss Penalty Reduction Using Bundled Capacity Prefetching in Multiprocessors
Nice, France
April 22-April 26
ISBN: 0-7695-1926-1
The capacity prefetching strategy proposed in this paper is built on the assumption that prefetching is more beneficial for reducing capacity and cold misses, than for reducing communication misses. We propose a simple scheme for detecting the most frequent communication misses and suggest that prefetching should be avoided for those. We also suggest a simple strategy for reducing the address traffic while retrieving many sequential cache lines called bundling. The two new strategies result in a lower miss rate for all studied applications, while the average amount of address traffic is reduced compared with the same application run with no prefetching.