Stop & Go BIST

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Proceedings of The Eighth IEEE International On-Line Testing Workshop (IOLTW'02)

Stop & Go BIST

Isle of Bendor, France

July 08-July 10

ISBN: 0-7695-1641-6

	ASCII Text	x
	Ilia Polian, Bernd Becker, "Stop & Go BIST," On-Line Testing Workshop, IEEE International, pp. 147, Proceedings of The Eighth IEEE International On-Line Testing Workshop (IOLTW'02), 2002.

	BibTex	x
	@article{ 10.1109/OLT.2002.1030198, author = {Ilia Polian and Bernd Becker}, title = {Stop & Go BIST}, journal ={On-Line Testing Workshop, IEEE International}, volume = {0}, year = {2002}, isbn = {0-7695-1641-6}, pages = {147}, doi = {http://doi.ieeecomputersociety.org/10.1109/OLT.2002.1030198}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - On-Line Testing Workshop, IEEE International TI - Stop & Go BIST SN - 0-7695-1641-6 SP EP A1 - Ilia Polian, A1 - Bernd Becker, PY - 2002 KW - BIST KW - Thermal constraints KW - Delay testing KW - IP cores VL - 0 JA - On-Line Testing Workshop, IEEE International ER -

Ilia Polian, Albert-Ludwigs-University

Bernd Becker, Albert-Ludwigs-University

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/OLT.2002.1030198

A BIST method enabling two-pattern testing at-speed without violating thermal constraints by introducing cool down periods is proposed. The application of the method is demonstrated based on a scalable BIST architecture. Applicability on IP cores is given since only a two-pattern test set is required as input.

Index Terms:

BIST, Thermal constraints, Delay testing, IP cores

Citation:

Ilia Polian, Bernd Becker, "Stop & Go BIST," ioltw, pp.147, Proceedings of The Eighth IEEE International On-Line Testing Workshop (IOLTW'02), 2002

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