Abstract: Hereafter, we propose a novel approach that couples HW/SW codesign with redundancy techniques to implement speech recognition systems (SRS). Due to the specific characteristics of digital signal processing (DSP) algorithms, these systems deserve special attention when partitioning the HW and SW parts. Also, in many applications like voice-oriented bank transactions or security systems, the need for reliability is also mandatory. Therefore, the methodology we present herein partitions the HW and SW parts in such a way to boost system performance while area overhead is maintained as low as possible. At the same time, reliability in terms of redundancy (Consistency Check and Transparent BIST) is included into the SRS. In the next sections of the paper, we will refer to the proposed approach as "speech recognition-oriented HW/SW partitioning and fault-tolerant design" approach (or simply SCORPION approach).