IEEE-INNS-ENNS International Joint Conference on Neural Networks (IJCNN'00)-Volume 3 FPGA Implementation of a Pulse Density Neural Network Using Simultaneous Perturbation Como, Italy July 24-July 27 ISBN: 0-7695-0619-4
In this paper, we describe a FPGA implementation of a pulse density neural network circuit with learning ability. We adopt the simultaneous perturbation method as a learning rule of the implementation. The learning rule requires only twice forward operations of networks. Thus, without complicated circuit that calculates gradients of an error function, we implemented the network system with learning ability. We designed a pulse density neural network using VHDL. Based on the design, FPGA system is fabricated. We confirmed simulation results of this implementation through the exclusive OR problem and simple function-learning problem.
Citation:
Yutaka Maeda, Toshiki Tada, "FPGA Implementation of a Pulse Density Neural Network Using Simultaneous Perturbation," ijcnn, vol. 3, pp.3296, IEEE-INNS-ENNS International Joint Conference on Neural Networks (IJCNN'00)-Volume 3, 2000 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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