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2001 International Conference on Parallel Processing Workshops (ICPPW'01)
A Parallel Iterative Solver Based on the Schur Complement System
Valencia, Spain
September 03-September 07
ISBN: 0-7695-1260-7
ASCII Text
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Germán Larrazábal, José M. Cela, "A Parallel Iterative Solver Based on the Schur Complement System," Parallel Processing Workshops, International Conference on, pp. 0149, 2001 International Conference on Parallel Processing Workshops (ICPPW'01), 2001.
 
 
BibTex
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@article{ 10.1109/ICPPW.2001.951921,
author = {Germán Larrazábal and José M. Cela},
title = {A Parallel Iterative Solver Based on the Schur Complement System},
journal ={Parallel Processing Workshops, International Conference on},
volume = {0},
year = {2001},
isbn = {0-7695-1260-7},
pages = {0149},
doi = {http://doi.ieeecomputersociety.org/10.1109/ICPPW.2001.951921},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Parallel Processing Workshops, International Conference on
TI - A Parallel Iterative Solver Based on the Schur Complement System
SN - 0-7695-1260-7
SP
EP
A1 - Germán Larrazábal,
A1 - José M. Cela,
PY - 2001
VL - 0
JA - Parallel Processing Workshops, International Conference on
ER -
 
Germán Larrazábal, Universidad de Carabobo
José M. Cela, Universidad Polit?cnica de Catalunya
Abstract: We present a parallel iterative solver for the Schur system. We have developed two preconditioners for this sys-tem. The preconditioners are based in a strongly dropped factorisation and algebraic multigrid technique, respectively. Two levels of parallelism are exploited using PVM and openMP. The preconditioners are tested with a scalar convection-diffusion equation, a set of industrial test cases arising from the finite element package PERMAS and the Davis collection. We have obtained quasi-linear speed-up until 32 processors.
Citation:
Germán Larrazábal, José M. Cela, "A Parallel Iterative Solver Based on the Schur Complement System," icppw, pp.0149, 2001 International Conference on Parallel Processing Workshops (ICPPW'01), 2001
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