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Sixth IEEE International Conference on Complex Computer Systems (ICECCS'00)
Definitions of Equivalence for Transformational Synthesis of Embedded Systems
Tokyo, Japan
September 11-September 15
ISBN: 0-7695-0583-X
L.A. Cortes, Dept. of Comput. & Inf. Sci., Linkoping Univ., Sweden
P. Eles, Dept. of Comput. & Inf. Sci., Linkoping Univ., Sweden
Zebo Peng, Dept. of Comput. & Inf. Sci., Linkoping Univ., Sweden
Abstract: Design of embedded systems is a complex task that requires design cycles founded upon formal notation, so that the synthesis from specification to implementation can be carried out systematically. The authors present a computational model for embedded systems based on Petri nets called PRES+. It includes an explicit notion of time and allows a concise formulation of models. Tokens, in our notation hold information, and transitions when fired perform transformation of data. Based on this model we define several notions of equivalence (reachable, behavioral, time, and total), which provide the framework for transformational synthesis of embedded systems. Different representations of an Ethernet network coprocessor are studied in order to illustrate the applicability of PRES+ and the definitions of equivalence on practical systems.
Index Terms:
embedded systems; equivalence; transformational synthesis; embedded systems design; complex task; design cycles; formal notation; computational model; Petri nets; PRES+; explicit notion; data transformation; Ethernet network coprocessor
Citation:
L.A. Cortes, P. Eles, Zebo Peng, "Definitions of Equivalence for Transformational Synthesis of Embedded Systems," iceccs, pp.0134, Sixth IEEE International Conference on Complex Computer Systems (ICECCS'00), 2000
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