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Fifth IEEE International Conference on Engineering of Complex Computer Systems (ICECCS'99)
A Realistic Architecture for Timed Testing
Las Vegas, Nevada
October 18-October 22
ISBN: 0-7695-0434-5
ASCII Text
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Eric Petitjean, Hacène Fouchal, "A Realistic Architecture for Timed Testing," Engineering of Complex Computer Systems, IEEE International Conference on, pp. 109, Fifth IEEE International Conference on Engineering of Complex Computer Systems (ICECCS'99), 1999.
 
 
BibTex
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@article{ 10.1109/ICECCS.1999.802855,
author = {Eric Petitjean and Hacène Fouchal},
title = {A Realistic Architecture for Timed Testing},
journal ={Engineering of Complex Computer Systems, IEEE International Conference on},
volume = {0},
year = {1999},
issn = {1050-4729},
pages = {109},
doi = {http://doi.ieeecomputersociety.org/10.1109/ICECCS.1999.802855},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - Engineering of Complex Computer Systems, IEEE International Conference on
TI - A Realistic Architecture for Timed Testing
SN - 1050-4729
SP
EP
A1 - Eric Petitjean,
A1 - Hacène Fouchal,
PY - 1999
KW - Testing
KW - Timed Automata
KW - Fault Model
KW - Real-Time Systems
KW - Protocol Engineering
KW - Labeled Transition Systems.
VL - 0
JA - Engineering of Complex Computer Systems, IEEE International Conference on
ER -
 
Eric Petitjean, Universit? de Reims Champagne-Ardenne
Hacène Fouchal, Universit? de Reims Champagne-Ardenne
The aim of this paper is to present a convenient test architecture for the purpose of testing timed systems. A timed system is described as timed automaton which is expressed as a region graph. This latter is then translated into a flattened automaton. Test sequences are derived from the flattened automaton. In order to check the conformity of a real life implementation, we detail the test architecture needed to execute the derived test sequences. This architecture considers the behavior part as well as the timed part of the system.
Index Terms:
Testing, Timed Automata, Fault Model, Real-Time Systems, Protocol Engineering, Labeled Transition Systems.
Citation:
Eric Petitjean, Hacène Fouchal, "A Realistic Architecture for Timed Testing," iceccs, pp.109, Fifth IEEE International Conference on Engineering of Complex Computer Systems (ICECCS'99), 1999
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