24th International Conference on Distributed Computing Systems Workshops - W7: EC (ICDCSW'04) On the Design of a Self-Reconfigurable SoPC Based Cryptographic Engine Hachioji, Tokyo, Japan March 23-March 24 ISBN: 0-7695-2087-1
This paper presents a SoPC (System-on-a-Programmable-Chip) embedded system featuring selfreconfigurable capability. It addresses the factors that limit the system performance when FPGAs are used to implement various encryption algorithms dynamically. The limiting factors are the data transfer rate between the host and the FPGA, and the reconfiguration latency. The results generated by the cryptographic engine reported in this paper show that in order to attain optimal performance, it is crucial to floor-plan the reconfigurable part of the FPGA.
Index Terms:
dynamic reconfiguration, embedded system, encryption engine, FPGA, ICAP, SoPC
Citation:
Tyrone Tai-On Kwok, Yu-Kwong Kwok, "On the Design of a Self-Reconfigurable SoPC Based Cryptographic Engine," icdcsw, vol. 7, pp.876-881, 24th International Conference on Distributed Computing Systems Workshops - W7: EC (ICDCSW'04), 2004 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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