2004 IEEE International Conference on Computer Design (ICCD'04) Combined Channel Segmentation and Buffer Insertion for Routability and Performance Improvement of Field Programmable Analog Arrays San Jose, CA October 11-October 13 ISBN: 0-7695-2231-9
In this paper, we propose a combined channel segmentation and buffer insertion approach, which minimizes the number of buffers inserted while satisfying the delay constraints for routing channels of field-programmable analog arrays. A segmented routing algorithm based on minimum-cost-bipartite-matching is improved with demand awareness and used to evaluate the various routing channels generated. Experiments show that, compared to a sequential segmenting-then-buffering design, our approach can significantly reduce the total number of buffers required, while achieving improved routability and minimum average interconnect delay. It is also shown that by increasing the number of long segment appropriately, the algorithm can dramatically improve the routability with a moderate increase on the number of buffers.
Citation:
Hu Huang, Joseph B. Bernstein, Martin Peckerar, Ji Luo, "Combined Channel Segmentation and Buffer Insertion for Routability and Performance Improvement of Field Programmable Analog Arrays," iccd, pp.490-495, 2004 IEEE International Conference on Computer Design (ICCD'04), 2004 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||