A Study of Hardware Techniques That Dynamically Exploit Frequent Operands to Reduce Power Consumption in Integer Function Units

I
ICCD
2003
2003 IEEE International Conference on Computer Design (ICCD'03)
Abstract - A Study of Hardware Techniques That Dynamically Exploit Frequent Operands to Reduce Power Consumption in Integer Function Units

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	Similar Articles Articles by Kaushal R. Gandhi Articles by Nihar R. Mahapatra

2003 IEEE International Conference on Computer Design (ICCD'03)

San Jose, California

October 13-October 15

ISBN: 0-7695-2025-1

	ASCII Text	x
	Kaushal R. Gandhi, Nihar R. Mahapatra, "A Study of Hardware Techniques That Dynamically Exploit Frequent Operands to Reduce Power Consumption in Integer Function Units," Computer Design, International Conference on, pp. 426, 2003 IEEE International Conference on Computer Design (ICCD'03), 2003.

	BibTex	x
	@article{ 10.1109/ICCD.2003.1240934, author = {Kaushal R. Gandhi and Nihar R. Mahapatra}, title = {A Study of Hardware Techniques That Dynamically Exploit Frequent Operands to Reduce Power Consumption in Integer Function Units}, journal ={Computer Design, International Conference on}, volume = {0}, year = {2003}, issn = {1063-6404}, pages = {426}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICCD.2003.1240934}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Computer Design, International Conference on TI - A Study of Hardware Techniques That Dynamically Exploit Frequent Operands to Reduce Power Consumption in Integer Function Units SN - 1063-6404 SP EP A1 - Kaushal R. Gandhi, A1 - Nihar R. Mahapatra, PY - 2003 KW - null VL - 0 JA - Computer Design, International Conference on ER -

Kaushal R. Gandhi, Michigan State University

Nihar R. Mahapatra, Michigan State University

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICCD.2003.1240934

We analyze three different techniques, namely, memoing (caching results that can be reused), narrow-width operand exploitation (limiting computation to low order bytes), and byte encoding (computation performed over significant bytes) that dynamically exploit operands to lower power consumption in integer function units. Previously, estimates of power savings based on switching activity were reported. Our implementation of integer function units (CLA, array multiplier, comparator, etc.) at the VLSI level and analysis using standard integer benchmarks from the SPEC CPU2000 suite provide realistic power savings and area and delay overheads.

Citation:

Kaushal R. Gandhi, Nihar R. Mahapatra, "A Study of Hardware Techniques That Dynamically Exploit Frequent Operands to Reduce Power Consumption in Integer Function Units," iccd, pp.426, 2003 IEEE International Conference on Computer Design (ICCD'03), 2003

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