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2003 IEEE International Conference on Computer Design (ICCD'03)
A Physical Design Methodology for 1.3GHz SPARC64 Microprocessor
San Jose, California
October 13-October 15
ISBN: 0-7695-2025-1
Noriyuki Ito, Fujitsu Limited, Japan
Hiroaki Komatsu, Fujitsu Limited, Japan
Yoshiyasu Tanamura, Fujitsu Limited, Japan
Ryoichi Yamashita, Fujitsu Limited, Japan
Hiroyuki Sugiyama, Fujitsu Limited, Japan
Yaroku Sugiyama, Fujitsu Limited, Japan
Hirofumi Hamamura, Fujitsu Limited, Japan
We present a physical design methodology that was applied to the design of Fujitsu 1.3GHz SPARC64 microprocessor. A tool-set called GigaGate was developed based on this methodology. The goal of GigaGate is to support the design team to complete the high-performance microprocessor design on schedule.
Citation:
Noriyuki Ito, Hiroaki Komatsu, Yoshiyasu Tanamura, Ryoichi Yamashita, Hiroyuki Sugiyama, Yaroku Sugiyama, Hirofumi Hamamura, "A Physical Design Methodology for 1.3GHz SPARC64 Microprocessor," iccd, pp.204, 2003 IEEE International Conference on Computer Design (ICCD'03), 2003
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