VLSI Design and Verification of the Imagine Processor

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	Similar Articles Articles by Brucek Khailany Articles by William J. Dally Articles by Andrew Chang Articles by Ujval J. Kapasi Articles by Jinyung Namkoong Articles by Brian Towles

2002 IEEE International Conference on Computer Design (ICCD'02)

Freiburg, Germany

September 16-September 18

ISBN: 0-7695-1700-5

	ASCII Text	x
	Brucek Khailany, William J. Dally, Andrew Chang, Ujval J. Kapasi, Jinyung Namkoong, Brian Towles, "VLSI Design and Verification of the Imagine Processor," Computer Design, International Conference on, pp. 289, 2002 IEEE International Conference on Computer Design (ICCD'02), 2002.

	BibTex	x
	@article{ 10.1109/ICCD.2002.1106784, author = {Brucek Khailany and William J. Dally and Andrew Chang and Ujval J. Kapasi and Jinyung Namkoong and Brian Towles}, title = {VLSI Design and Verification of the Imagine Processor}, journal ={Computer Design, International Conference on}, volume = {0}, year = {2002}, issn = {1063-6404}, pages = {289}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICCD.2002.1106784}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Computer Design, International Conference on TI - VLSI Design and Verification of the Imagine Processor SN - 1063-6404 SP EP A1 - Brucek Khailany, A1 - William J. Dally, A1 - Andrew Chang, A1 - Ujval J. Kapasi, A1 - Jinyung Namkoong, A1 - Brian Towles, PY - 2002 KW - null VL - 0 JA - Computer Design, International Conference on ER -

Brucek Khailany, Stanford University

William J. Dally, Stanford University

Andrew Chang, Stanford University

Ujval J. Kapasi, Stanford University

Jinyung Namkoong, Stanford University

Brian Towles, Stanford University

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICCD.2002.1106784

The Imagine stream processor is a 21 million transistor chip implemented by a collaboration between Stanford Unversity and Texas Instruments in a 1.5V 0.15 ?m process with fivelayers of aluminum metal. The VLSI design, clocking, and verification methodologies for the Imagine processor are presented. These methodologies enabled a small team of graduate students with limited resources to design a high-performance media processor in a modern ASIC flow.

Citation:

Brucek Khailany, William J. Dally, Andrew Chang, Ujval J. Kapasi, Jinyung Namkoong, Brian Towles, "VLSI Design and Verification of the Imagine Processor," iccd, pp.289, 2002 IEEE International Conference on Computer Design (ICCD'02), 2002

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