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2002 IEEE International Conference on Computer Design (ICCD'02)
Analysis of the Tradeoffs for the Implementation of a High-Radix Logarithm
Freiburg, Germany
September 16-September 18
ISBN: 0-7695-1700-5
ASCII Text
x 
 
J.-A. Piñeiro, M. D. Ercegovac, J. D. Bruguera, "Analysis of the Tradeoffs for the Implementation of a High-Radix Logarithm," Computer Design, International Conference on, pp. 132, 2002 IEEE International Conference on Computer Design (ICCD'02), 2002.
 
 
BibTex
x
 
@article{ 10.1109/ICCD.2002.1106760,
author = {J.-A. Piñeiro and M. D. Ercegovac and J. D. Bruguera},
title = {Analysis of the Tradeoffs for the Implementation of a High-Radix Logarithm},
journal ={Computer Design, International Conference on},
volume = {0},
year = {2002},
issn = {1063-6404},
pages = {132},
doi = {http://doi.ieeecomputersociety.org/10.1109/ICCD.2002.1106760},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Computer Design, International Conference on
TI - Analysis of the Tradeoffs for the Implementation of a High-Radix Logarithm
SN - 1063-6404
SP
EP
A1 - J.-A. Piñeiro,
A1 - M. D. Ercegovac,
A1 - J. D. Bruguera,
PY - 2002
KW - null
VL - 0
JA - Computer Design, International Conference on
ER -
 
J.-A. Piñeiro, Universidad Santiago de Compostela
M. D. Ercegovac, University of California at Los Angeles
J. D. Bruguera, Universidad Santiago de Compostela
An analysis of the tradeoffs between area and speed for a sequential implementation of a high-radix recurrence for logarithm computation is presented in this paper. The high-radix algorithm is outlined and a sequential architecture is proposed, with the use of selection by rounding of the digits and redundant representation. Estimates of the execution time and total area are obtained for n = 16, 32 and 64 bits of precision and for radix values from r = 8 to r = 1024. An analysis of the tradeoffs between area and speed is presented, showing that the most efficient implementations are obtained for radices r = 256 for 16, 32-bit and r = 128 for 64-bit computations.
Citation:
J.-A. Piñeiro, M. D. Ercegovac, J. D. Bruguera, "Analysis of the Tradeoffs for the Implementation of a High-Radix Logarithm," iccd, pp.132, 2002 IEEE International Conference on Computer Design (ICCD'02), 2002
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