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2002 IEEE International Conference on Computer Design (ICCD'02)
A CAD Tool for System-on-Chip Placement and Routing with Free-Space Optical Interconnect
Freiburg, Germany
September 16-September 18
ISBN: 0-7695-1700-5
Chung-Seok Seo, Georgia Institute of Technology
Abhijit Chatterjee, Georgia Institute of Technology
A wiring model for system-on-chips utilizing flexible free space optical interconnects is introduced. In this paper, we develop a CAD tool for physical placement of modules in system-on-chips manufactured using the optical interconnect technology. The tool also determines which of the interconnect are routed electrically and which are routed optically without exceeding the routing capacity of the optical interconnect while minimizing electrical wire length. About 50% reduction in largest delay of electrical wires is obtained through the use of optical interconnect (Performance improvement by a factor of 2).
Citation:
Chung-Seok Seo, Abhijit Chatterjee, "A CAD Tool for System-on-Chip Placement and Routing with Free-Space Optical Interconnect," iccd, pp.24, 2002 IEEE International Conference on Computer Design (ICCD'02), 2002
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