2002 IEEE International Conference on Computer Design (ICCD'02)
Functional Verification of the IBM zSeries eServer z900 System
Freiburg, Germany
September 16-September 18
ISBN: 0-7695-1700-5
This paper presents an overview on how the zSeries eServer z900 system has been functionally verified. It describes the hierarchical structure of verification, starting with designer simulation, unit-simulation, chip-simulation up to system simulation. For each step, the tools, methods and goals of verification are described. It also presents a description of the IT environment used at the different levels of verification, especially of dedicated simulation hardware like accelerator and emulator machines used for system simulation and hardware/software co-verification.