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1999 IEEE International Conference on Computer Design (ICCD'99)
CalmRISC™: A Low Power Microcontroller with Efficient Coprocessor Interface
Austin, Texas
October 10-October 13
ISBN: 0-7695-0406-X
Kyoung-Mook Lim, Samsung Electronics Co. and KAIST
Seh-Woong Jeong, Samsung Electronics Co. and KAIST
Yong-Chun Kim, Samsung Electronics Co. and KAIST
Seung-Jae Jeong, Samsung Electronics Co. and KAIST
Hong-Kyu Kim, Samsung Electronics Co. and KAIST
Yang-Ho Kim, Samsung Electronics Co. and KAIST
Bong-Young Chung, Samsung Electronics Co. and KAIST
Hyung-Lae Roh, Samsung Electronics Co. and KAIST
H.S. Yang, Samsung Electronics Co. and KAIST
This paper presents the low power architecture of CalmRISC, a low power 8-bit microcontroller consuming only 0.1mW per MIPS at 3.0V, and its efficient coprocessor interface. The architectural consideration of CalmRISC for low power consumption is presented. Some low power circuit design schemes as well as an efficient coprocessor interface scheme in CalmRISC are proposed and discussed.
Index Terms:
low-power, microcontroller, coprocessor
Citation:
Kyoung-Mook Lim, Seh-Woong Jeong, Yong-Chun Kim, Seung-Jae Jeong, Hong-Kyu Kim, Yang-Ho Kim, Bong-Young Chung, Hyung-Lae Roh, H.S. Yang, "CalmRISC™: A Low Power Microcontroller with Efficient Coprocessor Interface," iccd, pp.299, 1999 IEEE International Conference on Computer Design (ICCD'99), 1999
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