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28th Hawaii International Conference on System Sciences (HICSS'95)
Hawaii, USA
January 04-January 07
ISBN: 0-8186-6935-7
B. Lee, Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA
Chae Shin, Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA
A.R. Hurson, Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA
The issue of scalability is key to the success of massively parallel processing. Due to their distributed nature, message-passing multicomputers are appropriate for achieving scalar performance. However, the message-passing programming model lacks programmability due to difficulties encountered by the programmers to partition and schedule the computation over the processors and to establish efficient inter-processor communication in the user code. Therefore, this paper presents a compile-time scheduling heuristic, called BLAS, that maps programs onto the processors of a message-passing multicomputer. In contrast to other methods proposed in the literature, BLAS takes a more global approach in attempt to balance the tradeoff between exploitation of parallelism and reducing communication overhead. To evaluate the effectiveness of BLAS, detailed simulation studies of scheduling SISAL programs are presented.
Index Terms:
reconfigurable architectures; message passing; performance evaluation; processor scheduling; parallel programming; program compilers; scheduling; partially ordered program graphs; multicomputers; scalability; massively parallel processing; message-passing multicomputers; scalar performance; message-passing programming; inter-processor communication; user code; compile-time scheduling heuristic; BLAS; communication overhead; simulation studies; SISAL programs
Citation:
B. Lee, Chae Shin, A.R. Hurson, "A strategy for scheduling partially ordered program graphs onto multicomputers," hicss, pp.133, 28th Hawaii International Conference on System Sciences (HICSS'95), 1995
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