The Reflective Memory/Memory Channel (RM/MC) system represents a modular bus-based system architecture that belongs to the class of distributed shared memory systems. The RM/MC system is characterized by an update consistency mechanism for shared data and efficient block transfers over the bus. This work has two main goals. First, an extensive simulation analysis using the functional RM/MC simulator based on a very convenient and flexible synthetic workload model was carried out in order to evaluate the different design and implementation decisions and variants of the RM/MC concepts for a wide variety of the values of the relevant application-, architecture-, and technology-related parameters. In this way, an optimal set of values of relevant parameters was found. Second, this paper presents one improvement to the basic concept introduced to enhance the real-time response of the system. The proposed idea combines the compile- and run-time actions intended to reduce the latency of short messages. A set of experiments is performed to evaluate the efficiency of the proposed enhancement. The most important results are presented and discussed here.