S. Lucci, Dept. of Comput. Sci., City Univ. of New York, NY, USA
I. Gertner, Dept. of Comput. Sci., City Univ. of New York, NY, USA
A. Gupta, Dept. of Comput. Sci., City Univ. of New York, NY, USA
U. Hegde, Dept. of Comput. Sci., City Univ. of New York, NY, USA
Reflective memory may be thought of as hardware-supported replication of data on multiple computers. This simple mechanism has been extended further, in software, to support memory semantics required by multiprocessors. The paper describes the reflective memory implementation of the Encore Infinity-a distributed shared memory multiprocessor. A brief overview the system is provided and comparisons are made with other cached architectures. Spinlocks are employed in this system to manage the herculean cache coherency problems which are a natural result of any system which employs massive replication. A brief introduction to the recovery procedure used to return crashed nodes to normal operation is also described.
Index Terms:
shared memory systems; distributed memory systems; cache storage; system recovery; fault tolerant computing; reliability; reflective-memory multiprocessor; hardware-supported data replication; multiple computers; memory semantics; reflective memory implementation; Encore Infinity; distributed shared memory multiprocessor; cached architectures; spinlocks; cache coherency problems; massive replication; recovery procedure; crashed nodes
Citation:
S. Lucci, I. Gertner, A. Gupta, U. Hegde, "Reflective-memory multiprocessor," hicss, pp.85, 28th Hawaii International Conference on System Sciences (HICSS'95), 1995