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Ninth Great Lakes Symposium on VLSI
A 1.8V High Dynamic-Range CMOS High-Speed Four Quadrant Multiplier
Ann Arbor, Michigan
March 04-March 06
ISBN: 0-7695-0104-4
Chi-Hung Lin, Ohio State University
Mohammed Ismail, Ohio State University
A low-voltage ( = 3V) CMOS four quadrant multiplier is introduced which has an almost rail- to-rail differential-input-swing with a low signal- distortion( = 1% for 100kHz signal). The proposed circuit is composed of a pair of rail-to-rail differential-input V-I converters and a pair of voltage-followers. This topology of multiplier results in a high frequency capability with low power consumption. In a 1.2?m n-well CMOS process, the 3dB frequency of the multiplier is in a range of 103MHz. Measured total power consumption is around 0.52mW with supply voltage 2V. The multiplier can operate at a minimum supply voltage of 1.8V.
Citation:
Chi-Hung Lin, Mohammed Ismail, "A 1.8V High Dynamic-Range CMOS High-Speed Four Quadrant Multiplier," glsvlsi, pp.372, Ninth Great Lakes Symposium on VLSI, 1999
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