Low Power Chip Interface Based on Bus Data Encoding with Adaptive Code-Book Method

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Ninth Great Lakes Symposium on VLSI

Ann Arbor, Michigan

March 04-March 06

ISBN: 0-7695-0104-4

	ASCII Text	x
	Satoshi Komatsu, Makoto Ikeda, Kunihiro Asada, "Low Power Chip Interface Based on Bus Data Encoding with Adaptive Code-Book Method," Great Lakes Symposium on VLSI, pp. 368, Ninth Great Lakes Symposium on VLSI, 1999.

	BibTex	x
	@article{ 10.1109/GLSV.1999.757458, author = {Satoshi Komatsu and Makoto Ikeda and Kunihiro Asada}, title = {Low Power Chip Interface Based on Bus Data Encoding with Adaptive Code-Book Method}, journal ={Great Lakes Symposium on VLSI}, volume = {0}, year = {1999}, issn = {1066-1395}, pages = {368}, doi = {http://doi.ieeecomputersociety.org/10.1109/GLSV.1999.757458}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Great Lakes Symposium on VLSI TI - Low Power Chip Interface Based on Bus Data Encoding with Adaptive Code-Book Method SN - 1066-1395 SP EP A1 - Satoshi Komatsu, A1 - Makoto Ikeda, A1 - Kunihiro Asada, PY - 1999 VL - 0 JA - Great Lakes Symposium on VLSI ER -

Satoshi Komatsu, University of Tokyo

Makoto Ikeda, University of Tokyo

Kunihiro Asada, University of Tokyo

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/GLSV.1999.757458

An adaptive code-book encoding is proposed, which is applicable for low power chip-interface. In this method, data transition activity on bus signals is lowered by data encoding similar to the vector quantization (VQ). Transferred data on bus are the quantized vector numbers along with the Hamming difference between the original data and the quantized vector. A computer simulation and measurement results show that this encoding method is effective for low power chip-interface especially for the deep sub-micron VLSIs.

Citation:

Satoshi Komatsu, Makoto Ikeda, Kunihiro Asada, "Low Power Chip Interface Based on Bus Data Encoding with Adaptive Code-Book Method," glsvlsi, pp.368, Ninth Great Lakes Symposium on VLSI, 1999

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