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Ninth Great Lakes Symposium on VLSI
NMOS Energy Recovery Logic
Ann Arbor, Michigan
March 04-March 06
ISBN: 0-7695-0104-4
ASCII Text
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Chulwoo Kim, Seung-Moon Yoo, Sung-Mo (Steve) Kang, "NMOS Energy Recovery Logic," Great Lakes Symposium on VLSI, pp. 310, Ninth Great Lakes Symposium on VLSI, 1999.
 
 
BibTex
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@article{ 10.1109/GLSV.1999.757440,
author = {Chulwoo Kim and Seung-Moon Yoo and Sung-Mo (Steve) Kang},
title = {NMOS Energy Recovery Logic},
journal ={Great Lakes Symposium on VLSI},
volume = {0},
year = {1999},
issn = {1066-1395},
pages = {310},
doi = {http://doi.ieeecomputersociety.org/10.1109/GLSV.1999.757440},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - Great Lakes Symposium on VLSI
TI - NMOS Energy Recovery Logic
SN - 1066-1395
SP
EP
A1 - Chulwoo Kim,
A1 - Seung-Moon Yoo,
A1 - Sung-Mo (Steve) Kang,
PY - 1999
VL - 0
JA - Great Lakes Symposium on VLSI
ER -
 
Chulwoo Kim, University of Illinois at Urbana-Champaign
Seung-Moon Yoo, University of Illinois at Urbana-Champaign
Sung-Mo (Steve) Kang, University of Illinois at Urbana-Champaign
In this paper, we describe NMOS Energy Recovery Logic (NERL) which exhibits high throughput with low energy consumption due to efficient energy transfer and recovery using adiabatic and bootstrapping. NERL shows full output voltage swing, insensitivity to output load capacitance, less dependency on power-clock frequency and complementary outputs for balanced capacitance load to power-clock. We have designed an 8-bit CLA and inverter chain using 0.6?m CMOS technology and verified that NERL saves energy over ECRL by 2 to 3 times.
Citation:
Chulwoo Kim, Seung-Moon Yoo, Sung-Mo (Steve) Kang, "NMOS Energy Recovery Logic," glsvlsi, pp.310, Ninth Great Lakes Symposium on VLSI, 1999
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