Design Recovery for Incomplete Combinational Logic

G
GLSVLSI
1999
Ninth Great Lakes Symposium on VLSI
Abstract - Design Recovery for Incomplete Combinational Logic

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	Similar Articles Articles by Travis E. Doom Articles by Anthony S. Wojcik Articles by Moon-Jung Chung

Ninth Great Lakes Symposium on VLSI

Ann Arbor, Michigan

March 04-March 06

ISBN: 0-7695-0104-4

	ASCII Text	x
	Travis E. Doom, Anthony S. Wojcik, Moon-Jung Chung, "Design Recovery for Incomplete Combinational Logic," Great Lakes Symposium on VLSI, pp. 184, Ninth Great Lakes Symposium on VLSI, 1999.

	BibTex	x
	@article{ 10.1109/GLSV.1999.757406, author = {Travis E. Doom and Anthony S. Wojcik and Moon-Jung Chung}, title = {Design Recovery for Incomplete Combinational Logic}, journal ={Great Lakes Symposium on VLSI}, volume = {0}, year = {1999}, issn = {1066-1395}, pages = {184}, doi = {http://doi.ieeecomputersociety.org/10.1109/GLSV.1999.757406}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Great Lakes Symposium on VLSI TI - Design Recovery for Incomplete Combinational Logic SN - 1066-1395 SP EP A1 - Travis E. Doom, A1 - Anthony S. Wojcik, A1 - Moon-Jung Chung, PY - 1999 VL - 0 JA - Great Lakes Symposium on VLSI ER -

Travis E. Doom, Wright State University

Anthony S. Wojcik, Michigan State University

Moon-Jung Chung, Michigan State University

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/GLSV.1999.757406

Motivated by the problem of reengineering legacy digital circuits for which design information is missing or incomplete, this paper presents a new technique for representing the relationships among the internal components of a combinational circuit. This technique proves to be a powerful tool for redesign, capable of representing internal Boolean relationships in a fully or partially specified multiple-output combinational circuit with a single data structure.

Citation:

Travis E. Doom, Anthony S. Wojcik, Moon-Jung Chung, "Design Recovery for Incomplete Combinational Logic," glsvlsi, pp.184, Ninth Great Lakes Symposium on VLSI, 1999

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