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Ninth Great Lakes Symposium on VLSI
Inductance Effects in RLC Trees
Ann Arbor, Michigan
March 04-March 06
ISBN: 0-7695-0104-4
Yehea I. Ismail, University of Rochester and IBM Microelectronics
Eby G. Friedman, University of Rochester and IBM Microelectronics
Jose L. Neves, University of Rochester and IBM Microelectronics
A closed form solution for characterizing voltage-based signals in an RLC tree is presented. This closed form solution is used to derive figures of merit to characterize the effects of inductance at a specific node in an RLC tree. The effective damping factor of the signal at a specific node in an RLC tree is shown to be a useful figure of merit. As the effective damping factor of a signal increases, an RC model is sufficiently accurate to characterize that waveform. The rise time of the input signal driving an RLC tree is another factor characterizing the importance of inductance. As the rise time of the input signal becomes much larger than the effective LC time constant at a specific node within an RLC tree, the signal at this node does not exhibit the effects of inductance. Evidence is provided showing that using a single line analysis to determine the importance of including inductance to characterize a tree structured interconnect line is invalid in many cases and can lead to erroneous conclusions.
Citation:
Yehea I. Ismail, Eby G. Friedman, Jose L. Neves, "Inductance Effects in RLC Trees," glsvlsi, pp.56, Ninth Great Lakes Symposium on VLSI, 1999
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