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Great Lakes Symposium on VLSI '98
Stochastic Evolution Algorithm For Technology Mapping
Lafayette, Louisiana
February 19-February 24
ISBN: 0-8186-8409-7
Ahmad S. Al-Mulhem, King Fahd University of Petroleum and Minerals
Alaaeldin Amin, King Fahd University of Petroleum and Minerals
Habib Youssef, King Fahd University of Petroleum and Minerals
A new technology mapper (SELF-Map) for Look-Up Table (LUT) based Field Programmable Gate Arrays (FPGAs) is described. SELF-Map is based on the Stochastic Evolution (SE) algorithm. The state space model of the problem is defined and suitable cost function which allows optimization for area, delay, or area-delay combinations is proposed. Experimental results show that SELF-Map has an overall better performance compared to other algorithms reported in the literature.
Index Terms:
FPGA, Technology mapping, Stochastic Evolution, Boolean Network, Logic Synthesis.
Citation:
Ahmad S. Al-Mulhem, Alaaeldin Amin, Habib Youssef, "Stochastic Evolution Algorithm For Technology Mapping," glsvlsi, pp.380, Great Lakes Symposium on VLSI '98, 1998
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