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Great Lakes Symposium on VLSI '98
The Design of Residue Number System Arithmetic Units for A VLSI Adaptive Equalizer
Lafayette, Louisiana
February 19-February 24
ISBN: 0-8186-8409-7
Inseop Lee, University of Illinois at Urbana-Champaign
W. Kenneth Jenkins, University of Illinois at Urbana-Champaign
This paper presents the design details of an experimental ASIC for an all-digital adaptive equalizer. As an adaptive algorithm, LMS algorithm is chosen because of its simplicity. The adaptive equalizer design, which is based on an RNS architecture, consists of an RNS multiplier, an RNS adder, an RNS filter, a binary-to-residue converter, a residue-to-binary converter, and an update algorithm. The design is verified by a high level hardware simulation tool. The designs of all these units are discussed in this paper.
Index Terms:
RNS, LMS, residue number
Citation:
Inseop Lee, W. Kenneth Jenkins, "The Design of Residue Number System Arithmetic Units for A VLSI Adaptive Equalizer," glsvlsi, pp.179, Great Lakes Symposium on VLSI '98, 1998
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