loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Great Lakes Symposium on VLSI '98
Dynamic and Short-Circuit Power of CMOS Gates Driving Lossless Transmission Lines
Lafayette, Louisiana
February 19-February 24
ISBN: 0-8186-8409-7
Yehea I. Ismail, University of Rochester
Eby G. Friedman, University of Rochester
Jose L. Neves, IBM Microelectronics
The dynamic and short-circuit power consumption of a CMOS gate driving an LC transmission line as a limiting case of an RLC transmission line is investigated in this paper. Closed form solutions for the output voltage and short-circuit power of a CMOS gate driving an LC transmission line are presented. A closed form solution for the short-circuit power is also presented. These solutions agree with AS/X circuit simulations within 11% error for a wide range of transistor widths and line impedances. The ratio of the short-circuit to dynamic power is shown to be less than 7% for CMOS gates driving LC transmission lines where the line is matched or underdriven. The total power consumption is expected to decrease as inductance effects becomes more significant as compared to an RC dominated interconnect.
Index Terms:
VLSI, Lossless Transmission Lines, CMOS, Power, Short-circuit, Inductance, Dynamic
Citation:
Yehea I. Ismail, Eby G. Friedman, Jose L. Neves, "Dynamic and Short-Circuit Power of CMOS Gates Driving Lossless Transmission Lines," glsvlsi, pp.39, Great Lakes Symposium on VLSI '98, 1998
Usage of this product signifies your acceptance of the Terms of Use.