The MGAP Family of Processor Arrays

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7th Great Lakes Symposium on VLSI

Urbana, IL

March 13-March 15

ISBN: 0-8186-7904-2

	ASCII Text	x
	Kevin Acken, Eric Gayles, Tom Kelliher, Robert Owens, Mary Jane Irwin, "The MGAP Family of Processor Arrays," Great Lakes Symposium on VLSI, pp. 105, 7th Great Lakes Symposium on VLSI, 1997.

	BibTex	x
	@article{ 10.1109/GLSV.1997.580419, author = {Kevin Acken and Eric Gayles and Tom Kelliher and Robert Owens and Mary Jane Irwin}, title = {The MGAP Family of Processor Arrays}, journal ={Great Lakes Symposium on VLSI}, volume = {0}, year = {1997}, issn = {1066-1395}, pages = {105}, doi = {http://doi.ieeecomputersociety.org/10.1109/GLSV.1997.580419}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Great Lakes Symposium on VLSI TI - The MGAP Family of Processor Arrays SN - 1066-1395 SP EP A1 - Kevin Acken, A1 - Eric Gayles, A1 - Tom Kelliher, A1 - Robert Owens, A1 - Mary Jane Irwin, PY - 1997 VL - 0 JA - Great Lakes Symposium on VLSI ER -

Kevin Acken, The Pennsylvania State University

Eric Gayles, The Pennsylvania State University

Tom Kelliher, The Pennsylvania State University

Robert Owens, The Pennsylvania State University

Mary Jane Irwin, The Pennsylvania State University

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/GLSV.1997.580419

The Micro-Grain Array Processor (MGAP) is a family of massively parallel SIMD arrays of fine grain processing elements powerful enough to perform complex signal and image processing algorithms in real time. The MGAP was also designed to be compact enough to conveniently fit as an add-on board to a standard workstation at a fraction of the development cost of other comparable parallel machines. In this paper we update the status of the MGAP-2, which became operational in October 1996, and present a comparison of the MGAP-1 and the MGAP-2. We also give performance comparisons of the two designs through three popular image/video compression algorithms: the Discrete Cosine Transform, Motion Estimation, and Fractal Compression.

Citation:

Kevin Acken, Eric Gayles, Tom Kelliher, Robert Owens, Mary Jane Irwin, "The MGAP Family of Processor Arrays," glsvlsi, pp.105, 7th Great Lakes Symposium on VLSI, 1997

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