| | This Article | |
| |
| |
| | Share | |
| |
| |
| | Bibliographic References | |
| |
| |
| | Add to: | |
| |
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
| |
| | Search | |
| |
| |
| | |
6th Great Lakes Symposium on VLSI
CMOS Transistor Sizing for Minimization of Energy-Delay Product
Ames, IA
March 22-March 23
ISBN: 0-8186-7502-0
Citation:
Christophe Tretz, Charles Zukowski, "CMOS Transistor Sizing for Minimization of Energy-Delay Product," glsvlsi, pp.0168, 6th Great Lakes Symposium on VLSI, 1996