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Fifth Great Lakes Symposium on VLSI (GLSVLSI'95)
Pseudo-random behavioral ATPG
The State University of New York at Buffalo
March 16-March 18
ISBN: 0-8186-7035-5
A.-L. Courbis, LG12P, EMA-EERIE, Nimes, France
J.-F. Santucci, LG12P, EMA-EERIE, Nimes, France
This paper deals with a new approach for the Automatic Test Pattern Generation (ATPG) of circuits described from a behavioral point of view in VHDL. This approach is based on a pseudo-random process characterized by the fact that criteria for computing the test length and evaluating the quality of the generated data come from the field of software engineering. This paper presents the bases of this new approach in the field of hardware engineering and some experimental results.
Index Terms:
logic testing; automatic testing; fault diagnosis; hardware description languages; pseudo-random behavioral ATPG; VHDL
Citation:
A.-L. Courbis, J.-F. Santucci, "Pseudo-random behavioral ATPG," glsvlsi, pp.192, Fifth Great Lakes Symposium on VLSI (GLSVLSI'95), 1995
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