Fifth Great Lakes Symposium on VLSI (GLSVLSI'95)
Scheduling conditional data-flow graphs with resource sharing
The State University of New York at Buffalo
March 16-March 18
ISBN: 0-8186-7035-5
J. Siddhiwala, Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA
Liang-Fang Chao, Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA
This paper proposes pipeline scheduling algorithms for conditional branches and loop constructs, which are represented in the form of a conditional data-flow graph, where each node is associated with a condition vector. A novel data structure for dynamic resource sharing and a novel scheduling algorithm for resource sharing are proposed. Based on such a data structure and a modified rotation scheduling technique, a scheduling algorithm that performs resource sharing and loop pipelining simultaneously is designed.
Index Terms:
processor scheduling; data flow graphs; resource allocation; pipeline processing; parallel algorithms; data structures; high level synthesis; conditional data-flow graphs; resource sharing algorithm; pipeline scheduling algorithms; conditional branches; loop constructs; condition vector; data structure; dynamic resource sharing; rotation scheduling technique; loop pipelining; high level synthesis
Citation:
J. Siddhiwala, Liang-Fang Chao, "Scheduling conditional data-flow graphs with resource sharing," glsvlsi, pp.94, Fifth Great Lakes Symposium on VLSI (GLSVLSI'95), 1995