A Virtual Logic Algorithm for Solving Satisfiability Problems Using Reconfigurable Hardware

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	Similar Articles Articles by Miron Abramovici Articles by Jose T. de Sousa

Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines

Napa California

April 21-April 23

ISBN: 0-7695-0375-6

	ASCII Text	x
	Miron Abramovici, Jose T. de Sousa, "A Virtual Logic Algorithm for Solving Satisfiability Problems Using Reconfigurable Hardware," Field-Programmable Custom Computing Machines, Annual IEEE Symposium on, pp. 306, Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 1999.

	BibTex	x
	@article{ 10.1109/FPGA.1999.803708, author = {Miron Abramovici and Jose T. de Sousa}, title = {A Virtual Logic Algorithm for Solving Satisfiability Problems Using Reconfigurable Hardware}, journal ={Field-Programmable Custom Computing Machines, Annual IEEE Symposium on}, volume = {0}, year = {1999}, issn = {1082-3409}, pages = {306}, doi = {http://doi.ieeecomputersociety.org/10.1109/FPGA.1999.803708}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on TI - A Virtual Logic Algorithm for Solving Satisfiability Problems Using Reconfigurable Hardware SN - 1082-3409 SP EP A1 - Miron Abramovici, A1 - Jose T. de Sousa, PY - 1999 VL - 0 JA - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on ER -

Miron Abramovici, Bell Labs - Lucent Technologies

Jose T. de Sousa, Bell Labs - Lucent Technologies

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/FPGA.1999.803708

Satisfiability (SAT) is a computationally expensive algorithm central to computer science. In this paper, we present a virtual logic algorithm that allows an FPGA based reconfigurable computing platform to process SAT solver circuits much larger than its available capacity. Our algorithm is based on decomposition techniques that create independent sub-problems (pages) that fit the size of the available reconfigurable hardware. Those pages can take turns reusing the platform, and creating a virtual logic environment.

Citation:

Miron Abramovici, Jose T. de Sousa, "A Virtual Logic Algorithm for Solving Satisfiability Problems Using Reconfigurable Hardware," fccm, pp.306, Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 1999

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