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Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
SONIC - A Plug-In Architecture for Video Processing
Napa California
April 21-April 23
ISBN: 0-7695-0375-6
Simon D. Haynes, Imperial College of Science, Technology and Medicine
Peter Y. K. Cheung, Imperial College of Science, Technology and Medicine
Wayne Luk, Imperial College of Science, Technology and Medicine
John Stone, Sony Broadcast and Professional Europe
This paper presents the SONIC reconfigurable computing architecture and the first implementation, SONIC-1. SONIC is designed to support a software plug-in methodology to accelerate video image processing applications. SONIC differs from other architectures through the use of Plug-In Processing Elements (PIPEs) and the Application Programmer's Interface (API). Each PIPE contains a reconfigurable processor, a scalable router that also formats video data, and a frame-buffer memory. The SONIC architecture integrates multiple PIPEs together using a specialized bus structure which enables flexible and optimal pipelined processing. SONIC-1 communicates with the host PC through the PCI bus and has 8 PIPEs. We have developed an easy to use API which allows SONIC-1 to be used by multiple applications simultaneously. Preliminary results show that a 19 tap separable 2-D FIR filter implemented on a single PIPE achieves processing rates of more than 15 frames per second operating on 512 x 512 video transferred over the PCI bus. We estimate that using all 8 PIPEs, we could obtain real-time processing rates for complex operations such as image warping.
Index Terms:
SONIC, PIPE, reconifgurable, accelerator, plug-in, FPGA, PCI, video, image, processing, real-time
Citation:
Simon D. Haynes, Peter Y. K. Cheung, Wayne Luk, John Stone, "SONIC - A Plug-In Architecture for Video Processing," fccm, pp.280, Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 1999
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