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5th IEEE Symposium on FPGA-Based Custom Computing Machines (FCCM '97) Napa Valley, CA April 16-April 18 ISBN: 0-8186-8159-4 Table of Contents
N. Margolus, Center for Comput. Sci., Boston Univ., MA, USA pp. 2
J.R. Hauser, California Univ., Berkeley, CA, USA
J. Wawrzynek, California Univ., Berkeley, CA, USA pp. 12
A time-multiplexed FPGA (Abstract)
S. Trimberger, Xilinx Inc., San Jose, CA, USA
D. Carberry, Xilinx Inc., San Jose, CA, USA
A. Johnson, Xilinx Inc., San Jose, CA, USA
J. Wong, Xilinx Inc., San Jose, CA, USA pp. 22
An FPGA-based coprocessor for ATM firewalls (Abstract)
J.T. McHenry, Dept. of Defense, Fort Meade, ID, USA
P.W. Dowd, Dept. of Defense, Fort Meade, ID, USA
F.A. Pellegrino, Dept. of Defense, Fort Meade, ID, USA
T.M. Carrozzi, Dept. of Defense, Fort Meade, ID, USA
W.B. Cocks, Dept. of Defense, Fort Meade, ID, USA pp. 30
T. McDermott, Dept. of Electron., Macquarie Univ., North Ryde, NSW, Australia
P. Ryan, Dept. of Electron., Macquarie Univ., North Ryde, NSW, Australia
M. Shand, Dept. of Electron., Macquarie Univ., North Ryde, NSW, Australia
D. Skellern, Dept. of Electron., Macquarie Univ., North Ryde, NSW, Australia
T. Percival, Dept. of Electron., Macquarie Univ., North Ryde, NSW, Australia
N. Weste, Dept. of Electron., Macquarie Univ., North Ryde, NSW, Australia pp. 40
H. Schmit, Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA pp. 47
W. Luk, Dept. of Comput., Imperial Coll. of Sci., Technol. & Med., London, UK
N. Shirazi, Dept. of Comput., Imperial Coll. of Sci., Technol. & Med., London, UK
P.Y.K. Cheung, Dept. of Comput., Imperial Coll. of Sci., Technol. & Med., London, UK pp. 56
A dynamic reconfiguration run-time system (Abstract)
J. Burns, Dept. of Comput. Sci., Glasgow Univ., UK
A. Donlin, Dept. of Comput. Sci., Glasgow Univ., UK
J. Hogg, Dept. of Comput. Sci., Glasgow Univ., UK
S. Singh, Dept. of Comput. Sci., Glasgow Univ., UK
M. De Wit, Dept. of Comput. Sci., Glasgow Univ., UK pp. 66
G. Brebner, Dept. of Comput. Sci., Edinburgh Univ., UK pp. 77
The Chimaera reconfigurable functional unit (Abstract)
S. Hauck, Dept. of Electr. Eng. & Comput. Sci., Northwestern Univ., Evanston, IL, USA
T.W. Fry, Dept. of Electr. Eng. & Comput. Sci., Northwestern Univ., Evanston, IL, USA
M.M. Hosler, Dept. of Electr. Eng. & Comput. Sci., Northwestern Univ., Evanston, IL, USA
J.P. Kao, Dept. of Electr. Eng. & Comput. Sci., Northwestern Univ., Evanston, IL, USA pp. 87
R.A. Bittner, Jr., Dept. of Electr. & Comput. Eng., Virginia Polytech. Inst. & State Univ., Blacksburg, VA, USA
P.M. Athanas, Dept. of Electr. & Comput. Eng., Virginia Polytech. Inst. & State Univ., Blacksburg, VA, USA pp. 98
C. Ebeling, Dept. of Comput. Sci. & Eng., Washington Univ., Seattle, WA, USA
D.C. Cronquist, Dept. of Comput. Sci. & Eng., Washington Univ., Seattle, WA, USA
P. Franklin, Dept. of Comput. Sci. & Eng., Washington Univ., Seattle, WA, USA
J. Secosky, Dept. of Comput. Sci. & Eng., Washington Univ., Seattle, WA, USA
S.G. Berg, Dept. of Comput. Sci. & Eng., Washington Univ., Seattle, WA, USA pp. 106
W.B. Culbertson, Hewlett-Packard Co., Palo Alto, CA, USA
R. Amerson, Hewlett-Packard Co., Palo Alto, CA, USA
R.J. Carter, Hewlett-Packard Co., Palo Alto, CA, USA
P. Kuekes, Hewlett-Packard Co., Palo Alto, CA, USA
G. Snider, Hewlett-Packard Co., Palo Alto, CA, USA pp. 116
L. Moll, Pole Univ. Leonard da Vinci La Defense, France
M. Shand, Pole Univ. Leonard da Vinci La Defense, France pp. 125
J. Babb, Lab. for Comput. Sci., MIT, Cambridge, MA, USA
M. Frank, Lab. for Comput. Sci., MIT, Cambridge, MA, USA
V. Lee, Lab. for Comput. Sci., MIT, Cambridge, MA, USA
E. Waingold, Lab. for Comput. Sci., MIT, Cambridge, MA, USA
R. Barua, Lab. for Comput. Sci., MIT, Cambridge, MA, USA
M. Taylor, Lab. for Comput. Sci., MIT, Cambridge, MA, USA
J. Kim, Lab. for Comput. Sci., MIT, Cambridge, MA, USA
S. Devabhaktuni, Lab. for Comput. Sci., MIT, Cambridge, MA, USA
A. Agarwal, Lab. for Comput. Sci., MIT, Cambridge, MA, USA pp. 134
Qiang Wang, Dept. of Electr. & Comput., Toronto Univ., Ont., Canada
D.M. Lewis, Dept. of Electr. & Comput., Toronto Univ., Ont., Canada pp. 145
FPGA synthesis on the XC6200 using IRIS and Trianus/Hades (or from heaven to hell and back again) (Abstract)
R. Woods, Inst. of Adv. Microelectron., Queen's Univ., Belfast, UK
S. Ludwig, Inst. of Adv. Microelectron., Queen's Univ., Belfast, UK
J. Heron, Inst. of Adv. Microelectron., Queen's Univ., Belfast, UK
D. Trainor, Inst. of Adv. Microelectron., Queen's Univ., Belfast, UK
S. Gehring, Inst. of Adv. Microelectron., Queen's Univ., Belfast, UK pp. 155
M. Gokhale, David Sarnoff Res. Center, Princeton, NJ, USA
D. Gomersall, David Sarnoff Res. Center, Princeton, NJ, USA pp. 165
Acceleration of an FPGA router (Abstract)
P.K. Chan, Dept. of Comput. Eng., California Univ., Santa Cruz, CA, USA
M.D.F. Schlag, Dept. of Comput. Eng., California Univ., Santa Cruz, CA, USA pp. 175
Fault simulation on reconfigurable hardware (Abstract)
M. Abramovici, Lucent Technols., Bell Labs., Murray Hill, NJ, USA
P. Menon, Lucent Technols., Bell Labs., Murray Hill, NJ, USA pp. 182
Automated target recognition on SPLASH 2 (Abstract)
M. Rencher, Dept. of Electr. & Comput. Eng., Brigham Young Univ., Provo, UT, USA
B.L. Hutchings, Dept. of Electr. & Comput. Eng., Brigham Young Univ., Provo, UT, USA pp. 192
J. Woodfill, Interval Res. Corp., Palo Alto, CA, USA
B. Von Herzen, Interval Res. Corp., Palo Alto, CA, USA pp. 201
Increased FPGA capacity enables scalable, flexible CCMs: an example from image processing (Abstract)
J. Greenbaum, Ricoh California Res. Center, Menlo Park, CA, USA
M. Baxter, Ricoh California Res. Center, Menlo Park, CA, USA pp. 211
Comparison of arithmetic architectures for Reed-Solomon decoders in reconfigurable hardware (Abstract)
C. Paar, Dept. of Electr. & Comput. Eng., Worcester Polytech. Inst., MA, USA
M. Rosner, Dept. of Electr. & Comput. Eng., Worcester Polytech. Inst., MA, USA pp. 219
Yamin Li, Comput. Archit. Lab., Univ. of Aizu, Aizu-Wakamatsu, Japan
Wanming Chu, Comput. Archit. Lab., Univ. of Aizu, Aizu-Wakamatsu, Japan pp. 226
T.J. Callahan, California Univ., Berkeley, CA, USA
J. Wawrzynek, California Univ., Berkeley, CA, USA pp. 234
S. Kelem, Xilinx Inc., San Jose, CA, USA pp. 236
U. Tangen, Inst. fur Molekulare Biotech., Jena, Germany
L. Schulte, Inst. fur Molekulare Biotech., Jena, Germany
J.S. McCaskill, Inst. fur Molekulare Biotech., Jena, Germany pp. 238
G.H. Chapman, Sch. of Eng. Sci., Simon Fraser Univ., Burnaby, BC, Canada
B. Dufort, Sch. of Eng. Sci., Simon Fraser Univ., Burnaby, BC, Canada pp. 240
Hyun-Kyu Yun, Div. of Eng., Brown Univ., Providence, RI, USA
A. Smith, Div. of Eng., Brown Univ., Providence, RI, USA
H. Silverman, Div. of Eng., Brown Univ., Providence, RI, USA pp. 242
N.W. Bergmann, Space Centre for Satellite Navigation, Queensland Univ. of Technol., Brisbane, Qld., Australia
Y.Y. Chung, Space Centre for Satellite Navigation, Queensland Univ. of Technol., Brisbane, Qld., Australia
B.K. Gunther, Space Centre for Satellite Navigation, Queensland Univ. of Technol., Brisbane, Qld., Australia pp. 244 Usage of this product signifies your acceptance of the Terms of Use.
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