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27th Euromicro Conference 2001: A Net Odyssey (euromicro'01)
Case Study: Formal Specification and Verification of Railway Interlocking System
Warsaw, Poland
September 04-September 06
ISBN: 0-7695-1236-4
Tomas Hlavaty, Czech Technical University in Prague
Libor Preucil, Czech Technical University in Prague
Petr Stepan, Czech Technical University in Prague
Abstract: The contribution addresses the problem of software life-cycle, aspects and application of formal methods in functional specification, design and verification of real-time software systems in safety-critical applications. The target application thereunder aims to verify the critical parts of the designed interlocking system. The higher safety, reliability and minimized costs of the design can be achieved using presented techniques. Bidding for this a synchronous data-flow language Lustre has been used to verify safety properties of selected parts of the system. The introduced test-case has been implemented on distributed architecture of multiple single-chip microprocessors.
Citation:
Tomas Hlavaty, Libor Preucil, Petr Stepan, "Case Study: Formal Specification and Verification of Railway Interlocking System," euromicro, pp.0258, 27th Euromicro Conference 2001: A Net Odyssey (euromicro'01), 2001
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