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25th Euromicro Conference (EUROMICRO '99)-Volume 1
High Level Pre-Synthesis Optimization Steps Using Hierarchical Conditional Dependency Graphs
Milan, Italy
September 08-September 10
ISBN: 0-7695-0321-7
Apostolos A. Kountouris, MITSUBISHI ELECTRIC ITE
Taking advantage of existing High-Level Synthesis (HLS) tools is a possibility that merits consideration. Existing HLS technology took many years to develop and has reached a stage where complex combinations of optimization trade-off 's can be handled. At this stage, developing a whole new tool chain based on a different internal representation seems to be quite impractical. Nevertheless it is always possible to add some high level optimizing step which permits to improve the performance of existing tools.In this context we propose high level pre-synthesis optimization using our HCDGs (Hierarchical Conditional Dependency Graph) as internal representation. Combination of pre-synthesis and powerful HCDG representation is a principal novelty of our approach. Experimental results using as target synthesis tool the SYNOPSYS behavioral compiler, show significant amelioration of the synthesis results.
Citation:
Apostolos A. Kountouris, Christophe Wolinski, "High Level Pre-Synthesis Optimization Steps Using Hierarchical Conditional Dependency Graphs," euromicro, vol. 1, pp.1290, 25th Euromicro Conference (EUROMICRO '99)-Volume 1, 1999
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