Multithreading techniques use coarse-grain parallelism to speed-up computation of a multithreaded workload by better utilization of the resources of a single processor.This paper surveys context-switching techniques for multithreaded single-issue processors and classifies the techniques due to the events that trigger a context switch.We survey static and dynamic block interleaving techniques and demonstrate the application of several techniques in the decoupled multithreaded Rhamma processor.We show that a speed-up of up to 2.1 can be reached with four threads over a single-threaded base processor.