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25th Euromicro Conference (EUROMICRO '99)-Volume 1
A Time-Domain Model for Power Dissipation of CMOS Buffers Driving Lossy Transmission Lines
Milan, Italy
September 08-September 10
ISBN: 0-7695-0321-7
Gregorio Cappuccino, University of Calabria
Giuseppe Cocorullo, University of Calabria and IRECE-National Council of Research
In this paper a simple time-domain line model for power dissipation calculation for CMOS buffers driving lossy transmission line is presented. The main benefits of the proposed model is its simplicity, maintaining the merit of a lumped-circuit model, that leads to great simulation efficiency. It requires in fact, a single resistor to calculate with sufficient accuracy both power dissipation aliquots in the CMOS-line-driver and in intra-chip lossy interconnects for modern VLSI integrated circuits.
Citation:
Gregorio Cappuccino, Giuseppe Cocorullo, "A Time-Domain Model for Power Dissipation of CMOS Buffers Driving Lossy Transmission Lines," euromicro, vol. 1, pp.1204, 25th Euromicro Conference (EUROMICRO '99)-Volume 1, 1999
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