24 th. EUROMICRO Conference Volume 1 (EUROMICRO'98) A Useful Micropipeline Architecture to Implement DSP Algorithms Västerås, Sweden August 25-August 27 ISBN: 0-8186-8646-4
This paper describes an asynchronous architecture to implement DSP algorithms using the micropipeline technique. The micropipeline technique is already quite popular in the asynchronous community due to its compatibility with the conventional logic. However, there is currently little guidance on how to use micropipeline for more complex designs. The architecture proposed will meet this need. The architecture is scalable to trade off between size and speed, and has automation potential.
Citation:
Chiu-sing Choy, Tin-chak Pang, Juraj Povazanec, Cheong-fat Chan, "A Useful Micropipeline Architecture to Implement DSP Algorithms," euromicro, vol. 1, pp.10212, 24 th. EUROMICRO Conference Volume 1 (EUROMICRO'98), 1998 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||