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2003 NASA/DoD Conference on Evolvable Hardware (EH'03)
Hardware spiking neural network with run-time reconfigurable connectivity in
Chicago, Illinois
July 09-July 11
ISBN: 0-7695-1977-6
Daniel Roggen, Autonomous Systems Laboratory, Institute of Systems Engineering
Stephane Hofmann, Autonomous Systems Laboratory, Institute of Systems Engineering
Yann Thoma, Autonomous Systems Laboratory, Institute of Systems Engineering
Dario Floreano, Autonomous Systems Laboratory, Institute of Systems Engineering
A cellular hardware implementation of a spiking neural network with run-time reconfigurable connectivity is presented. It is implemented on a compact custom FPGA board which provides a powerful reconfigurable hardware platform for hardware and software design. Complementing the system, a CPU synthesized on the FPGA takes care of interfacing the network with the external world. The FPGA board and the hardware network are demonstrated in the form of a controller embedded on the Khepera robot for a task of obstacle avoidance. Finally, future implementations on new multi-cellular hardware are discussed.
Citation:
Daniel Roggen, Stephane Hofmann, Yann Thoma, Dario Floreano, "Hardware spiking neural network with run-time reconfigurable connectivity in," eh, pp.199, 2003 NASA/DoD Conference on Evolvable Hardware (EH'03), 2003
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