This paper presents experimental results of fast intrinsic evolutionary design and evolutionary fault recovery of a 4-bit Digital to Analog Converter (DAC) using the JPL stand-alone board-level evolvable system (SABLES). SABLES is part of an effort to achieve integrated evolvable systems and provides autonomous, fast (tens to hundreds of seconds), on-chip evolution involving about 100,000 circuit evaluations. Its main components are a JPL Field Programmable Transistor Array (FPTA) chip used as transistor-level reconfigurable hardware, and a TI DSP that implements the evolutionary algorithm controlling the FPTA reconfiguration. The paper describes an experiment consisting of the hierarchical evolution of a 4-bit DAC using 20 cells of the FPTA chip. Fault-recovery is demonstrated after applying stuck-at 0 faults to all switches of one particular cell, and using evolution to recover functionality. It has been verified that the functionality can be recovered in less than one minute after the fault is detected while the evolutionary design of the 4-bit DAC from scratch took about 3 minutes.