Abstract: One of the major limiting factors for the development of hardware platforms able to support evolvable hardware principles is the lack of simple and compact in-system dynamic routing strategies. In this paper we shall present a programmable hardware architecture whose internal organization permits to perform dynamic routing processes. The architecture is based on a regular bi-dimensional array of functional cells. A hierarchical layered organization has been provided for these cells. Specific routing resources have been included in one of these layers, so that they permit to construct in an incremental way routing paths among the functional cells. The dynamic routing strategy is based on a replication process that is able to connect a source cell with various target cells. One of the major advantages of the proposed routing strategy lies in the fact that its complexity grows only linearly with the array size. Furthermore it is scalable, accommodating without performance degradation to any array size. Behavioral hardware descriptions have been created for the functional cells that constitute the array. As the simulation and synthesis results will show, the proposed routing strategy will permit the implementation of actual evolvable hardware principles.