loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
12th IEEE International Conference and Workshops on the Engineering of Computer-Based Systems (ECBS'05)
Hierarchical Multiple Associative Mapping in Cache Memories
Greenbelt, Maryland
April 04-April 07
ISBN: 0-7695-2308-0
Hamid R. Zarandi, Sharif University of Technology
Seyed Ghassem Miremadi, Sharif University of Technology
In this paper, a new cache placement scheme is proposed to achieve higher hit ratios with respect to the two conventional schemes namely set-associative and direct mapping. Similar to set-associative, in this scheme, cache space is divided into sets of different sizes. Hence, the length of tag fields associated to each set is also variable and depends on the partition it is in. The proposed mapping function has been simulated with some standard trace files and statistics are gathered and analyzed for different cache configurations. The results reveal that the proposed scheme exhibits a higher hit ratio compared to the two well-known mapping schemes, namely set-associative and direct mapping, using LRU replacement policy. Also, its area and power consumption is less than full-associative scheme.
Citation:
Hamid R. Zarandi, Seyed Ghassem Miremadi, "Hierarchical Multiple Associative Mapping in Cache Memories," ecbs, pp.95-101, 12th IEEE International Conference and Workshops on the Engineering of Computer-Based Systems (ECBS'05), 2005
Usage of this product signifies your acceptance of the Terms of Use.