IEEE Symposium and Workshop on Engineering of Computer Based Systems (ECBS'96)
Toward reconfigurable associative architecture for high speed communication operators
Friedrichshafen, GERMANY
March 11-March 15
ISBN: 0-8186-7355-9
R. Djemal, Lab. Logiciels Syst. Reseaux, CNRS, Grenoble, France
G. Mazare, Lab. Logiciels Syst. Reseaux, CNRS, Grenoble, France
G. Michel, Lab. Logiciels Syst. Reseaux, CNRS, Grenoble, France
The renewed interest in the new associative organization is driven by advances in technologies and the increase in the need for intelligent and real-time application complexity, based on complex data structures. This paper presents a novel and practical architecture pointing to the feasibility of a structured addressable associative memory related to high speed communication protocols. This organization provides a maximum of flexibility in the mapping of the associative memory according to the need of application context in an efficient manner. In this respect, several techniques have been investigated and developed in order to solve problems inherent in many previous CAM architectures. Results of tests, allowing the architecture validation using SYMOPSYS tool and FPGA experimental board, are presented.
Index Terms:
reconfigurable architectures; content-addressable storage; local area networks; asynchronous transfer mode; real-time systems; memory architecture; reconfigurable associative architecture; high speed communication operators; associative organization; real-time; complex data structures; structured addressable associative memory; high speed communication protocols; CAM architectures; SYMOPSYS tool; FPGA; architecture validation; LAN; local area network; asynchronous transfer mode
Citation:
R. Djemal, G. Mazare, G. Michel, "Toward reconfigurable associative architecture for high speed communication operators," ecbs, pp.74, IEEE Symposium and Workshop on Engineering of Computer Based Systems (ECBS'96), 1996