Combination of initial approximation through a table look-up and Newton-Raphson iteration is an effective way to compute reciprocal, which may replace the division op-eration. This paper presents the design and implementation of reciprocal unit, which computes the reciprocal of double precision of floating-point number in eleven clock cycles. The presented design utilizes a 2^{10} x 20 bits ROM followed by two Newton-Raphson iterations. The design is implemented in VHDL and synthesized to estimate the area and the worst case delay. Simulation results show that the least significand bit of the result cannot be guaranteed to be correct for all cases.