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Euromicro Symposium on Digital System Design (DSD'04)
Implicit vs. Explicit Resource Allocation in SMT Processors
Rennes, France
August 31-September 03
ISBN: 0-7695-2203-3
ASCII Text
x 
 
Francisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernandez, Alex Ramirez, Mateo Valero, "Implicit vs. Explicit Resource Allocation in SMT Processors," Digital Systems Design, Euromicro Symposium on, pp. 44-51, Euromicro Symposium on Digital System Design (DSD'04), 2004.
 
 
BibTex
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@article{ 10.1109/DSD.2004.1333257,
author = {Francisco J. Cazorla and Peter M. W. Knijnenburg and Rizos Sakellariou and Enrique Fernandez and Alex Ramirez and Mateo Valero},
title = {Implicit vs. Explicit Resource Allocation in SMT Processors},
journal ={Digital Systems Design, Euromicro Symposium on},
volume = {0},
year = {2004},
isbn = {0-7695-2203-3},
pages = {44-51},
doi = {http://doi.ieeecomputersociety.org/10.1109/DSD.2004.1333257},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Digital Systems Design, Euromicro Symposium on
TI - Implicit vs. Explicit Resource Allocation in SMT Processors
SN - 0-7695-2203-3
SP44
EP51
A1 - Francisco J. Cazorla,
A1 - Peter M. W. Knijnenburg,
A1 - Rizos Sakellariou,
A1 - Enrique Fernandez,
A1 - Alex Ramirez,
A1 - Mateo Valero,
PY - 2004
KW - null
VL - 0
JA - Digital Systems Design, Euromicro Symposium on
ER -
 
Francisco J. Cazorla, DAC, UPC, Spain
Peter M. W. Knijnenburg, LIACS, Leiden University, the Netherlands
Rizos Sakellariou, University of Manchester, UK
Enrique Fernandez, University of Las Palmas Gran Canaria, Spain
Alex Ramirez, DAC, UPC, Spain
Mateo Valero, DAC, UPC, Spain
In a Simultaneous Multithreaded (SMT) architecture, the front end of a superscalar is adapted in order to be able to fetch from several threads while the back end is shared among the threads.
In this paper, we describe different resource sharing models in SMTprocessors. We show that explicit resource allocation can improve SMT performance. In addition, it enables SMTs to solve other QoS requirements, not realizable before.
Citation:
Francisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernandez, Alex Ramirez, Mateo Valero, "Implicit vs. Explicit Resource Allocation in SMT Processors," dsd, pp.44-51, Euromicro Symposium on Digital System Design (DSD'04), 2004
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