Euromicro Symposium on Digital Systems Design (DSD'03)
A Dynamically Reconfigurable Accelerator for Operations over Boolean and Ternary Vectors
Belek-Antalya, Turkey
September 01-September 06
ISBN: 0-7695-2003-0
This paper suggests a novel architecture for a reconfigurable accelerator for computations over discrete vectors. The number of executed operations is limited but they can arbitrarily be chosen from a practically unlimited set of feasible operations. The software model and hardware implementations of the accelerator are discussed in detail.
Citation:
Valery Sklyarov, Iouliia Skliarova, Arnaldo Oliveira, Ant?nio B. Ferrari, "A Dynamically Reconfigurable Accelerator for Operations over Boolean and Ternary Vectors," dsd, pp.222, Euromicro Symposium on Digital Systems Design (DSD'03), 2003