loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Euromicro Symposium on Digital Systems Design (DSD'03)
DYNORA: A New Caching Technique
Belek-Antalya, Turkey
September 01-September 06
ISBN: 0-7695-2003-0
P. Srivatsan, Sri Venkateswara College of Engineering, Chennai, India
P. B. Sudarshan, Sri Venkateswara College of Engineering, Chennai, India
P. P. Bhaskaran, Sri Venkateswara College of Engineering, Chennai, India
Cache design for high performance computing requires the realization of two seemingly disjoint goals of higher hit ratios at reduced access times. Recent research advocates the use of "resizable" caches to exploit cache requirement variability in programs. Existing schemes for resizable caches effectively employ either of the two fundamentally different methods: by changing the cache organization itself or by using a proper resizing strategy, that is, either static or dynamic resizing. Our paper looks at a new dynamic resizing strategy that aims at run time manipulation of the cache parameters to improve its performance. Two algorithms for dynamic reconfiguration are proposed and the results explained.
Citation:
P. Srivatsan, P. B. Sudarshan, P. P. Bhaskaran, "DYNORA: A New Caching Technique," dsd, pp.70, Euromicro Symposium on Digital Systems Design (DSD'03), 2003
Usage of this product signifies your acceptance of the Terms of Use.