Euromicro Symposium on Digital Systems Design (DSD'03)
Distance-aware L2 Cache Organizations for Scalable Multiprocessor Systems
Belek-Antalya, Turkey
September 01-September 06
ISBN: 0-7695-2003-0
In this paper, we suggest an LRU/distance-aware combined second-level(L2) cache for scalable CC-NUMA multiprocessors, which is composed of a traditional LRU cache and an additional cache maintaining the distance information of individual cache blocks. The LRU cache selects a victim using age information, while the distance-aware cache does using distance information. Both work together to reduce the overall distance effectively upon cache misses by keeping long-distance blocks as well as recently used blocks. It has been observed that the proposed cache outperforms the traditional LRU cache by up to 28% in the execution time. It is also found to perform even better than an LRU cache of twice the size.
Citation:
Sung Woo Chung, Hyong-Shik Kim, Chu Shik Jhon, "Distance-aware L2 Cache Organizations for Scalable Multiprocessor Systems," dsd, pp.24, Euromicro Symposium on Digital Systems Design (DSD'03), 2003